DESIGN 

 adder/subtractor
that adds/ subtracts and accumulates

n-bit numbers using the 2's complement representation

AND TEST IT on A UP-3 BOARD.

Guiding example on the use of LPM modules in your design.

REPORTING by November 10, 2006:

FIRST, CREATE SPECIFICATION REQUIREMENTS AND TEST PATTERNS FOR YOUR PROJECT!

1. Design and verify your design in simulation using MODEL_SIM . The waveforms obtained using MODEL-SIM should correspond to the waveforms given in the specification.,

2. Created a project in QUARTUS using the same design and test VHDL files you have created in MODEL_SIM. Complie and simulate your design again.

3. Create and NET-List for the FPGA device on UP-3 board.

4. Verify your design on the board. The result you obtain on the board

should correspond to specification and your simulation.

Please have fun and enjoy your project!