1. Computer Abstraction.
2. The role of performance.
3. Computer arithmetic:

1. Computer representation of integers, fractions, rational, irrational numbers;
2. Negative number representation and arithmetic;
3. Multiplication algorithms,
4. Division algorithms

Students will explore arithmetic instructions using (SPIM) simulator.

1. Machine language, instruction set architecture,

1. Representing instructions in the computer,
2. Addressing modes
3. Control instructions
4. Procedure call instructions
5. RISC versus CISC instructions

Students will perform projects using SPIM simulator and assembler.

1. Construction of arithmetic logic unit(ALU)

1. Design of 32 bit ALU
2. Carry lookahead
3. Overflow detection

Student will design complete 4bit ALU using VHDL and simulate it

(using MAXPLUS2 Software from ALTERA Corp.)

1. The processor

1. Datapath
2. Single clock cycle control
3. Multiple clock cycle control
4. Microprogramming
5. RISC versus CISC

Student will design controller using graphical FSM design tools and VHDL.

1. Pipelining

1. Pipelined datapath
2. Pipelined control
3. Control and data hazards, stalls
4. Branch hazards
5. Reducing hazards: data forwarding
6. Branch prediction, speculative execution, register renaming techniques.

Students will explore pipelining using SPIM simulator

1. Memory

1. Memory Hierarchy
2. Performance issues ( page faults , cache misses)

Students will explore cache performance using the Dinero simulator.

Students will have to write a program that "kills" cache performance.

1. I/O Devices

1. Disks
2. Storage devices(RAID)
3. Buses
4. Bus Hierarchies
5. Networks

Student will perform quantitative analysis of I/O performance.

1. Commercially available architectures ( Alpha, Pentium, Sparc, Mips

Vax-11) will be described. RISC versus CISC.

2. Multiprocessors