CS  343   Computer Organization and Design Laboratory

Fall 2010

Catalog Description

Introduction to FPLD technology, logic synthesis, and rapid prototyping of digital systems using commercial CAD tools. Topics:Programmable Logic Technology. Sequential Design and Hierarchy. Synthesis of Digital Hardware using VHDL. State Machine Design, CPU Controller. A Simple Processor Design. Video Graphics Adapter(VGA) video display generation. Design PS/2 Keyboard interface. Design of PS/2 Mouse interface. Synthesis of a RISC processor as covered in CSc 34200. Students are required to prepare written reports and demonstrate their design.

Organization and Schedule    Lecture 3,  Credit 3(CS342) , Laboratory (CS 343)  3, Credit 1

Semester                     Meeting Type                    Days                     Time                            Location                           Dates

Fall 2010                        Lecture (CS 342)               M,W                     5:00 –  6:15 PM          NAC  5-109                      Aug. 28 – Dec. 16

Fall 2010                       Laboratory (CS 343)         Friday                   10:15– 1:15 PM          NAC  5-103                      Aug. 28 – Dec. 16

 

                                                                              

Prerequisites                   Required:  CS 210.

Corequisites                     CS 342

Course Goals

This is a hands-on course. It complements the material covered in a corequisite CS342 course. The labs will introduce you  to the use of commercial computer-aided design tools ModelSim, Quartus to design, simulate, and to perform functional and timing verification of digital circuits, and eventually program FPGA devices.

 

Course Audience

This is a core course for Computer Science and Computer Engineering majors.  The students are expected to have little experience in assembly language and logic design.

 

Technology and Tools Used In This Course

·      Microsoft Windows XP, Vista  (operating system used in the laboratory)

·      LINUX (operating system used in the laboratory)

·      ModelSim-Altera Edition  (for simulating all FPGA designs)

·      QUARTUS II  (for design entry,simulation and  programming FPGA devices)

·      Altera® DE2 development and education board (for testing your designs)

Course Coordinator

Name                                    Office                       Phone                      Email Address                                          Office Hours

Izidor Gertner               NAC  8-202F                 212-650-6173         csicg@cs.ccny.cuny.edu                         M,W 4:00-5:00 PM

Course Instructor

Name                                    Office                       Phone                      Email Address                                          Office Hours

Steven Medina               NAC  7-103                  212-650-5552         smedina1984@hotmail.com                   M,W 4:00-5:00 PM

Required Textbook

   Furman, Michael D., Rapid Prototyping of Digital Systems, 4th edition, Publisher: Springer, 2007

Recommended References

 

http://www.altera.com

 

 

Laboratory projects

Students design, simulate and verify the correctness of digital circuits using ModelSim and Quatrus CAD tools.  Students have to test their designs on a FPGA device and prepare a demo and a report.

Specific projects:

1. Adders: These adders include half-adders, full-adders

        1.1 Then students design an Overflow Detection circuit

2. Memory Elements design: The purpose of this lab is to investigate Latches, Flip-Flops, and

    Registers and their timing.

3. Finite State Machine design: The purpose of this lab is implement a FSM that recognizes two

    specific sequences at the input.

4. Clocks and Timers: implement 3-digit BCD counter using real-time clock.

5  Multipliers: Design a circuit to implement multiplication algorithm

6. Memory: use as megacore memory block to store and retrieve values.

7. Simple Processor: In this lab, the students design a simple processor. This processor must

 

Grading Policy:

·       To get a 100% grade in the lab All projects have to be completed + Detailed reports.

·       Proper reporting is essential to get a 100% grade. Each report should contain the following sections:

o    Objective,

o     Source code,

o     Explanations and Screen shots + Pictures of the DE-2 board with the display,

o    Conclusions. 

·       The display should demonstrate that your design works on the board! 

·       If your report is not in a proper form and it does not prove that your design works on the board - you will get partial credit (reduced grade).